2MHz

[blackystardust68]

Fancy meeting you here, Amidog

I have thought about what you are describing, and as far as I know the SuperCPU cartridge uses a caching mechanism for its ram read/writes. For the I/O read/writes I'm unsure, the writes could possibly be cached, and the reads could possibly involve wait-states.

But from an emulation point of view the 20 MHz mode and staying cycle exact would require a very powerful machine, maybe a dynamic recompilation system would be faster than an interpretive system, but also more difficult to implement.

Eventually I do want to build SuperCPU support in VICE, but I might start with some of the older 65816 accelerator cartridges that ran at speeds like 4 MHz.

[Mathias Roslund]

The "CMD SUPERCPU RAM EXPANSION & TIMING" (suprtime.pdf) document covers just about everything I think. It will still be quite a challenge getting everything correct and running at an acceptable speed. After all, each and every read/write to SuperRAM memory will require computing any delays (incl. halfcycle delays) caused by non-sequential accesses, row/col changes etc...